• Home
• About
• Contact

• Home
• Forum/ BBS
• Articles
• News
• Sitemap

Developing with μT-Engine/Nios II

PMC has a 32-bit Altera NIOS-II soft-core processor running the T-Kernel. Since it is a soft-core processor, it is instantiated on an Altera Cyclone FPGA in the system. This FPGA can also be used to accelerate other modules in hardware. However, since this is a μT-Engine and the NIOS-II processor does not support a Memory Management Unit (MMU), the system does not come with the T-Kernel/Standard Extension (TK/SE) and therefore does not support a file system like the regular T-Engine does.

Due to this reason, there are some differences when developing software/ systems with the μT-Engine/Nios II. This article highlights some of these differences and explains how to develop software for the μT-Engine/Nios II. Primarily, this article is targeted at people who have experience with developing programs for the T-Engine but want to know how to develop on the μT-Engine/Nios II platform. Although we used the μT-Engine/Nios II for this work, the ideas presented here should be generally applicable to any μT-Engine.

The original documents and guidelines for developing with the μT-Engine/Nios II are in Japanese. Therefore, this article is based on my working experience with the platform and on loose translations of the Japanese documents.

Introduction to μT-Engine/Nios II Platform

The μT-Engine/Nios II is produced by Altima. Since the T-Kernel stack has been ported to the Nios II, it is now possible to use the soft-core processor together with the T-Kernel. The Nios soft core is a general-purpose 32-bit RISC CPU component of Altera’s Excalibur™ embedded processor solutions and enables engineers to integrate systems on a single programmable logic device (PLD). The Nios 2.0 soft core can potentially provide system integration and customization advantages that may not available in other processors. The combination of the Nios soft core and the T-Kernel simplifies design processes and improves time-to-market for designers building applications in the areas of low-volume consumer products, digital entertainment, networking and telecommunications, etc.

Original Images are from: http://altimanet.com/altima/products/tengine_board.htm

(Block Diagram Translation by TE@Onghu)

The specifications of the board (compliant with the μT-Engine specification) are as follows:

FPGA	ALTERA Cyclone FPGA EP1C20F400
CPU	ALTERA Nios II (32 bits RISC)
Flash Memory	4 MBytes
SDRAM	16 MBytes
Input/Output Interfaces	Compact Flash (CF) card, MMC card, Expansion bus I/F, Serial and eTRON chip I/F
Power Source	AC Adapter
External Size	60mm x 85mm

The board runs T-Kernel v1.A0.00 and the development environment is very similar to the SH7727 T-Engine platform. This platform, however, does not have MMU and file system, which make the developing procedure a little different. This article highlights these differences – by paying attention to these differences, it is quite easy to develop for this board.

Installing the GNU Development Environment

Since this step is essentially the same as setting up the environment for any other T-Engine, we shall skip this step in this article. You could refer to our article about setting up the environment under Linux or to the article on the TEADEC website that discusses how to set up the environment under Cygwin.

Platform Boot Procedure

The procedure below is used to start up the system.

1. FPGA RAM is configured based on the information in FLASH memory
2. The monitor loads and initializes the hardware.
3. When DIP-SW 1 is OFF, the system boots from the ROM disk, and starts out with T-Kernel starting address. When DIP-SW 1 is ON, T-Monitor starts up and waits for command entry. In this situation, the system will start out with the startup address of T-Kernel when BD command typed.
4. T-Kernel is initialized based on the information in ROM with the following parameters.
   • SYSCONF System configuration
   • DEVCONF Device configuration
5. The following drivers are loaded: PC Card manager, Clock (RTC), Console (serial), System disk and RS232C.
6. After the OS initialization is completed, the user initialization program which is set in the ROM information is executed. If the user initialization program is not defined, IMS would be started as the initial task to wait for input of commands.
7. In the user initialization program, drivers and subsystems are started, and then application tasks are started. Then, based on the commands entered through the IMS, programs are launched, power is shut down, or system is restarted.

Compile, Link and Download

Compiling and linking are carried out making use of common makerules (etc/makerules). The directory used for a “make” operation must be named either nios2 or nios2.*. If not, you will need to alter the makefile. Here, we take the T-Kernel-based program as an example to describe how to compile and load it.

There is a T-Kernel based sample program in the directory: $BD/kappl/sample/ We use this program to discuss the method of compiling and executing a program on this board.

Move to the corresponding directory to execute make.

Next, start TeraTerm to transfer the program to the memory of the target machine. Make sure that DIP-SW1 is OFF before you turn on the power of the target machine. The program is supposed to be stored in ROM. Therefore, the file is transferred by using the FLLO command of the T-Monitor.

[IMS]% # (Move to T-Monitor) TM> FLLO (TeraTerm will display a dialog to let you select file you want to transfer. We select sample.mot.) Loaded: 00480000 -> 004855EF Writing Flash ROM at 480000 [1 blks] ... wait TM> g (Return to IMS) [IMS]% lodspg @0x00480000 (T-Kernel based program is executed by IMS command “lodspg @ address”.) hello (ac=1) av[0] = '@0x480000' SYSPRG @00480000 [0] [IMS]% unlspg @0x00480000 (It ends the program which is started by lodspg, IMS command “unlspg @ address” is executed.) hello (ac=-1)

There are a couple of points to note:

• Check the makefile to make sure that the start address should be 0×00480000, or else when loading the program, the console will display ERR: Illegal Address Range and fail to load the program.
• Since there is no file system on the platform, we have to execute programs by specifying the loading address.

That’s all there is in this article. As we continue to work more with the μT-Engine/Nios II board, we will publish more information to this website – so, stay tuned.